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Description: 使用68013的测试程序,包含68013固件程序(采用slave FIFO bulk同步读写,EP2 OUT,EP6 IN),驱动,PC端测试用程序。CPLD的VHDL代码
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Size: 1012462 |
Author: 李华 |
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Description: ALTERA关于CCD的一些verilog程序,都通过运行无误的。-ALTERA on a number of Verilog CCD procedures, both by running unmistakable.
Platform: |
Size: 14336 |
Author: 邹振兴 |
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Description: 直接应用USB接口,对FPGA/CPLD等芯片的下载。便于用手提电脑的玩家使用。大家可以里面有单片机的源程序和PLD的下载程序。-Direct application of USB interface on the FPGA/CPLD chip, such as downloads. Easy to use laptop computers to use the player. Everyone can have MCU inside and PLD source of the download process.
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Size: 21504 |
Author: feng |
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Description: maxplusII开发平台,适用于不是很熟悉USB上层开发的技术人员,可以快速开发出高速USB的DMA传输-maxplusII development platform for the top is not very familiar with the USB technology developed by staff, can quickly develop a high-speed USB transmission of the DMA
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Size: 130048 |
Author: 洪炉 |
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Description: ATmega128实验板。RS232,SRAM,CPLD调试通过,uCosII可以运行,ethernet部分没有完成,usb完成了一部分。 有参考价值。-ATmega128 board. RS232, SRAM, CPLD through debugging, uCosII can run, ethernet part not completed, usb part completed. A valuable reference.
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Size: 9984000 |
Author: zdy |
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Description: TMS320F28335开发例程,包括USB,串口,AD,DA-TMS320F28335 development of routines, including USB, serial, AD, DA
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Size: 5382144 |
Author: |
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Description: 这是自制altera usb_blaster所用到的CPLD程序,用VHDL语言写的。
Platform: |
Size: 2048 |
Author: wdy2004 |
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Description: 用cpld控制时序通过usb传送数据到pc机的vhdl源码,用于一款心电图机。
Platform: |
Size: 203776 |
Author: 聂永波 |
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Description: ATmega128实验板
简要介绍:
主要芯片:
CPU:ATmega128L
SRAM:SR61L256BS-8
CPLD:XILINX XC95144XL
SFLASH:AT45DB081B
ETHERNET:CS8900A
USB:PDIUSBD12
LCD:122x32 LMC62_095_M
POWER:LM2596S-3.3
RS232:MAX3232
软件:RS232,SRAM,CPLD调试通过,uCosII可以运行,ethernet部分没有完成,usb完成了一部分。
开发环境:
WINAVR,ISE6,AVR Studio-ATmega128 board briefly introduce the experiment: the main chips: CPU: ATmega128L SRAM: SR61L256BS-8 CPLD: XILINX XC95144XL SFLASH: AT45DB081B ETHERNET: CS8900A USB: PDIUSBD12 LCD: 122x32 LMC62_095_M POWER: LM2596S-3.3 RS232: MAX3232 software: RS232, SRAM, CPLD Debug through, uCosII can run, ethernet part not completed, usb part completed. Development Environment: WINAVR, ISE6, AVR Studio
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Size: 9936896 |
Author: yhui |
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Description: FPGA、CPLD芯片的usb数据下载线,下载速度是并口的5位,内有原理图用程序-FPGA, CPLD chip usb data download lines, download speed is the parallel port of the five, with a schematic diagram of procedures in
Platform: |
Size: 234496 |
Author: 李聚光 |
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Description: usb-blaster,USB口的CPLD下载线路,全套制作资料,内有详细说明-usb-blaster, USB port download CPLD lines, a full set of production data, which has a detailed description
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Size: 2328576 |
Author: czla |
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Description: usb cy7c68013开发板中CPLD的源代码-USB2.0-128P to restore the I2C settings dev_io
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Size: 2048 |
Author: 桂霖 |
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Description: altera usb下载线原理图和cpld程序-altera usb download cable schematics and procedures cpld
Platform: |
Size: 61440 |
Author: peter |
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Description: :CPLD 可编程技术具有功能集成度高、设计灵活、开发周期短、成本低等特
点。介绍基于ATMEL 公司的CPLD 芯片ATF1508AS 设计的串并转换和高速
USB 及其在高速高精度数据采集系统中的应用-: CPLD programmable technology with a high degree of functional integration, design flexibility, short development cycle, and low cost. ATMEL-based company introduced the CPLD chip ATF1508AS SERDES design and high-speed USB and its application in high-speed high-precision data acquisition system
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Size: 186368 |
Author: 简单 |
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Description: 键盘和USB与PC机的接口程序,适用于CPLD FPGA设计中,与上位机的连接与通信-Keyboard and USB and PC-interface program for the design of CPLD FPGA with PC connectivity and communication
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Size: 165888 |
Author: mengzi |
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Description: The Spartan3E Starter Kit is xup s only supported hardware platform. Its integrated programming hardware consists of a cy7c68013a-100axc EZ-USB and a XC2C256-VQ100-6C CPLD.
Mysteriously, the starter kit s schematics exclude this USB programming hardware. The programmer s electrical connectivity was reverse engineered to implement xup.
The standalone Xilinx Platform Cable USB is unsupported and untested. Since its hardware is presumably very similar, it may be usable as-is or with some minor hacking.
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Size: 56320 |
Author: LJK |
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Description: 用CPLD驱动UART转USB芯片CP2102的verilog代码,与PC通信
包括CP2102的配置 驱动等-Using CPLD to drive the USB-UART CP2102 interface. verilog code, then communicate with PC, including the configuration and drivers, etc.
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Size: 1024 |
Author: vicky |
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Description: 简要介绍:
主要芯片:
CPU:ATmega128L
SRAM:SR61L256BS-8
CPLD:XILINX XC95144XL
SFLASH:AT45DB081B
ETHERNET:CS8900A
USB:PDIUSBD12
LCD:122x32 LMC62_095_M
POWER:LM2596S-3.3
RS232:MAX3232
软件:RS232,SRAM,CPLD调试通过,uCosII可以运行,ethernet部分没有完成,usb完成了一部分。 -HD MP3 USE MEGA128
Platform: |
Size: 11170816 |
Author: shi |
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Description: usb-fpga通讯,从cpld到usb协议芯片slave fifo的通讯过程指导。-The usb-FPGA communication from the CPLD to usb protocol chip slave FIFO communication process guidance.
Platform: |
Size: 6144 |
Author: 牟娇 |
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Description: USB_BLASTER的CPLD文件,已编译好,直接烧录即可(USB Blaster for the Altera Corporation)
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Size: 1024 |
Author: HUAKEEN |
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